The i-MOS Project
An Open Platform for Device Modeling and Circuit Simulation
i-MOS is an open platform for model developers and circuit designers to interact. Model developers can implement their models over the i-MOS platform to promote their acceptance and obtain user feedback. Circuit designers can use the platform to try out the most recent models of many newly developed devices before they are released by EDA vendors. The platform provides a standard interface so that users can evaluate and compare models easily. Standard benchmark tests can also be performed on the models. Currently, the platform can only output the characteristics of models. In phase II of the project, an online simulation engine will be provided and users can directly perform simulation over the i-MOS server any time and anywhere as long as they can get connected to the Internet.
Please note that the site is lightly moderated. We'll honor all the postings, but we will exercise our right to remove spam, hostile, irrelevant and offending postings.> Browse News About i-MOS
Expanding model library
It is the intention of i-MOS to provide an authoring tool for model developer to upload their model implemented in Verilog-A code directly to i-MOS for users to test and evaluate. Currently we are using the Automatic Device Model Synthesizer(ADMS) together with experienced programmers to help the compilation of worthwhile models to the i-MOS platform.> Launch Model Library
by UC Berkeley
n-type CNT FET
News and Event Highlights
07 Jul 2016
I-MOS Upgrade: To make the drawing of schematic more convenient,default parameters are loaded automatically to netlist from schematic when "Convert from schematic" is click. Saving model parameters to the model library prior to drawing of schematic is optional now!
01 Jun 2016
I-MOS Upgrade: The major upgrade of i-MOS website has been finished. You are welcome to drop any comment for the new i-MOS website.
31 May 2016
I-MOS Upgrade: i-MOS website will be undergoing a major upgrade from 9:00am-6:00pm on 01 Jun 2016. You will not be able to login during this period of time. We are sorry for any inconvenience caused.
23 May 2016
I-MOS Upgrade: New model Surface Potential-Based Compact Model for AVS-GFEThas been added to the Device Model Page.
09 May 2016
I-MOS Upgrade: New model Surface Potential-Based Compact Model for a-IGZO TFT(IGZOTFT) has been added to the Device Model Page.
21 Mar 2016
I-MOS Upgrade: New model e-JIM has been added to the schematic interface.